S/390 G5 CMOS microprocessor diagnostics

被引:6
|
作者
Song, P
Motika, F
Knebel, DR
Rizzolo, RF
Kusko, MP
机构
[1] IBM Syst, Div 390, Poughkeepsie, NY 12601 USA
[2] IBM Corp, Micrus, E Fishkill Fac, Fishkill, NY 12533 USA
[3] IBM Corp, Div Res, Thomas J Watson Res Ctr, Yorktown Hts, NY 10598 USA
[4] IBM Corp, Server Grp, Fishkill, NY 12533 USA
关键词
D O I
10.1147/rd.435.0899
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This paper describes the strategies and techniques used to diagnose failures in the IBM 600-MHz S/390(R) G5 (Generation 5) CMOS microprocessor and the associated cache chips. The complexity, density, cycle time, and technology issues related to the hardware, coupled with time-to-market requirements, have necessitated a quick diagnostic turnaround time. Beginning with the first prototype of the G5 microprocessor chip, intense chip diagnostics and physical failure analysis (PFA) have successfully identified the root causes of many failures, including process, design, and random manufacturing defects. In this paper, three different diagnostic techniques are described that have enabled the G5 to achieve its objective. An example is presented for each technique to demonstrate its effectiveness.
引用
收藏
页码:899 / 914
页数:16
相关论文
共 50 条
  • [1] IBM's S/390 G5 microprocessor design
    Slegel, Timothy J.
    Averill III, Robert M.
    Check, Mark A.
    Giamei, Bruce C.
    Krumm, Barry W.
    Krygowski, Christopher A.
    Li, Wen H.
    Liptay, John S.
    MacDougall, John D.
    McPherson, Thomas J.
    Navarro, Jennifer A.
    Schwarz, Eric M.
    Shum, Kevin
    Webb, Charles F.
    IEEE Micro, 19 (02): : 12 - 23
  • [2] IBM's S/390 G5 microprocessor design
    Slegel, TJ
    Averill, RM
    Check, MA
    Giamei, BC
    Krumm, BW
    Krygowski, CA
    Li, WH
    Liptay, JS
    MacDougall, JD
    McPherson, TJ
    Navarro, JA
    Schwarz, EM
    Shum, K
    Webb, CF
    IEEE MICRO, 1999, 19 (02) : 12 - 23
  • [3] The S/390 G5/G6 binodal cache
    Turgeon, PR
    Mak, P
    Blake, MA
    Fee, MF
    Ford, CB
    Meaney, PJ
    Seigler, R
    Shen, WW
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1999, 43 (5-6) : 661 - 670
  • [4] Deep submicron design techniques for the 500MHz IBM S/390 G5 custom microprocessor
    Hoffman, DE
    Averill, RM
    Curran, B
    Chan, YH
    Dansky, A
    Hatch, R
    McNamara, T
    McPherson, T
    Northrop, G
    Sigal, L
    Pelella, A
    Williams, PM
    INTERNATIONAL CONFERENCE ON COMPUTER DESIGN: VLSI IN COMPUTERS AND PROCESSORS, PROCEEDINGS, 1998, : 258 - 263
  • [5] Custom S/390 G5 and G6 microprocessors
    Check, MA
    Slegel, TJ
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1999, 43 (5-6) : 671 - 680
  • [6] Microprocessor test and test tool methodology for the 500MHz IBM S/390 G5 chip
    Kusko, MP
    Robbins, BJ
    Snethen, TJ
    Song, PL
    Foote, TG
    Huott, WV
    INTERNATIONAL TEST CONFERENCE 1998, PROCEEDINGS, 1998, : 717 - 726
  • [7] S/390 G5/G6 binodal cache
    Turgeon, Paul R.
    Pak-Kin, Mak
    Blake, Michael A.
    Fee, Michael F.
    Ford III, Carl B.
    Meaney, P.J.
    Seigler, R.
    Shen, W.W.
    IBM Journal of Research and Development, 43 (05): : 661 - 670
  • [8] The S/390 G5 floating-point unit
    Schwarz, EM
    Krygowski, CA
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1999, 43 (5-6) : 707 - 721
  • [9] MCM technology and design for the S/390 G5 system
    Katopis, GA
    Becker, WD
    Mazzawy, TR
    Smith, HH
    Vakirtzis, CK
    Kuppinger, SA
    Singh, B
    Lin, PC
    Bartells, J
    Kihlmire, GV
    Venkatachalam, PN
    Stoller, HI
    Frankel, JL
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1999, 43 (5-6) : 621 - 650
  • [10] RAS strategy for IBM S/390 G5 and G6
    Mueller, M
    Alves, LC
    Fischer, W
    Fair, ML
    Modi, I
    IBM JOURNAL OF RESEARCH AND DEVELOPMENT, 1999, 43 (5-6) : 875 - 888