A pragmatic perspective on UML for system-on-chip design

被引:0
|
作者
Indrusiak, Leandro Soares [1 ]
机构
[1] Tech Univ Darmstadt, Microelect Syst Inst, D-64283 Darmstadt, Germany
来源
关键词
D O I
暂无
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper covers the role of the Unified Modeling Language (UML) either as a competing or complementary language in the SoC design flow and enumerates a number of problems that must be addressed before UML can be embraced by system designers as an useful and necessary part of the SoC design flow.
引用
收藏
页码:169 / 171
页数:3
相关论文
共 50 条
  • [1] Using UML activities for System-on-Chip design and synthesis
    Schattkowsky, Tim
    Hausmann, Jan Hendrik
    Engels, Gregor
    [J]. MODEL DRIVEN ENGINEERING LANGUAGES AND SYSTEMS, PROCEEDINGS, 2006, 4199 : 737 - 752
  • [2] A UML for a multiprocessor system-on-chip
    Bique, Stephen
    [J]. WMSCI 2006: 10TH WORLD MULTI-CONFERENCE ON SYSTEMICS, CYBERNETICS AND INFORMATICS, VOL IV, PROCEEDINGS, 2006, : 218 - 223
  • [3] High level system-on-chip design using UML and SystemC
    Correa, Blanca Alicia
    Eusse, Juan Fernando
    Munera, Danny
    Aedo, Jose Edinson
    Velez, Juan Fernando
    [J]. CERMA 2007: ELECTRONICS, ROBOTICS AND AUTOMOTIVE MECHANICS CONFERENCE, PROCEEDINGS, 2007, : 740 - 745
  • [4] Interfacing UML 2.0 for multiprocessor System-on-Chip design flow
    Riihimaki, Jouni
    Kukkala, Petri
    Kangas, Tero
    Hannikainen, Marko
    Hamalainen, Timo D.
    [J]. 2005 INTERNATIONAL SYMPOSIUM ON SYSTEM-ON-CHIP, PROCEEDINGS, 2005, : 108 - 111
  • [5] On core and more: A design perspective for system-on-chip
    Meyr, H
    [J]. SIPS 97 - 1997 IEEE WORKSHOP ON SIGNAL PROCESSING SYSTEMS: DESIGN AND IMPLEMENTATION, 1997, : 60 - 63
  • [6] An object-oriented design process for system-on-chip using UML
    Zhu, Q
    Matsuda, A
    Kuwamura, S
    Nakata, T
    Shoji, M
    [J]. ISSS'02: 15TH INTERNATIONAL SYMPOSIUM ON SYSTEM SYNTHESIS, 2002, : 249 - 254
  • [7] System-on-chip verification process using UML
    Zhu, Q
    Nakata, T
    Mine, M
    Kuroki, K
    Endo, Y
    Hasegawa, T
    [J]. UML MODELING LANGUAGES AND APPLICATIONS, 2005, 3297 : 138 - 149
  • [8] System-on-chip validation using UML and CWL
    Zhu, Q
    Oishi, R
    Hasegawa, T
    Nakata, T
    [J]. INTERNATIONAL CONFERENCE ON HARDWARE/SOFTWARE CODESIGN AND SYSTEM SYNTHESIS, 2004, : 92 - 97
  • [9] A design methodology for the development of a complex system-on-chip using uml and executable system models
    Pauwels, M
    Vanderperren, Y
    Sonck, G
    van Oostende, P
    Dehaene, W
    Moore, T
    [J]. SYSTEM SPECIFICATION AND DESIGN LANGUAGES: BEST OF FDL '02, 2003, : 129 - 141
  • [10] System-on-Chip Design and Implementation
    Brackenbury, Linda E. M.
    Plana, Luis A.
    Pepper, Jeffrey
    [J]. IEEE TRANSACTIONS ON EDUCATION, 2010, 53 (02) : 272 - 281