Variable block size motion estimation algorithm and its hardware architecture for H.264/AVC

被引：0
|
作者：
Lee, JH
Lee, NS
机构：
来源：
2004 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 3, PROCEEDINGS | 2004年
关键词：
D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
This paper presents a variable block size motion estimation (ME) algorithm and its hardware architectures dedicated to H.264/AVC. Proposed ME architecture can achieve real-time processing for 720x480@30Hz with search range of [-64, +63] in the horizontal and [-32, +3 11 in the vertical direction at integer-pel accuracy and upto 7 reference frames at the operating frequency of 54MHz.
引用
收藏
页码：741 / 744
页数：4
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