Performance of the strength-reduced adaptive filter architecture for 51.84 Mb/s ATM-LAN

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作者
Goel, M
Shanbhag, NR
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中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
In this paper, a pipelined strength-reduced (PIPSR) adaptive filter architecture is employed as a receive equalizer for 51.84 Mb/3 ATM-LAN over unshielded twisted pair category-3 (UTP-a) wiring. This architecture provides the advantage of low-power dissipation and high-speed operation. Simulation results are presented to investigate the effect of level of pipelining on the steady-state signal-to-noise ratio at the slicer (SNRslicer). Simulation results indicate that speed-ups of up to 160 can be achieved with about 0.8 dB loss in SNRslicer.
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页码:2132 / 2135
页数:4
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