Novel techniques for reducing self-heating effects in Silicon-On-Insulator power devices

被引:0
|
作者
Roig, J [1 ]
Flores, D [1 ]
Vellvehi, M [1 ]
Rebollo, J [1 ]
Millan, J [1 ]
机构
[1] CSIC, CNM, Barcelona 08193, Spain
关键词
D O I
10.1109/SMICND.2001.967513
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Self-heating effects in Silicon-On-Insulator (SOI) power devices have become a serious problem when the active silicon layer thickness is reduced and buried oxide thickness is increased. In order to alleviate the self-heating, two novel techniques which lead to a better heat flow from active silicon layer to silicon substrate through the buried oxide layer in SOI power devices are proposed No significant changes on device electrical characteristics are expected with the inclusion of the novel techniques. The electro-thermal performance of lateral power devices including the proposed techniques is also presented.
引用
收藏
页码:493 / 496
页数:4
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