Writing architecture for magnetic random access memory with negative pulse writing scheme

被引：0

作者：

Chang, C. P. ^{[1
]}

Hung, C. C. ^{[1
]}

Wang, Y. H. ^{[1
]}

Lee, Y. J. ^{[1
]}

Su, K. L. ^{[1
]}

Chen, W. C. ^{[1
]}

Chen, Y. H. ^{[1
]}

Lin, C. S. ^{[1
]}

Kao, M. J. ^{[1
]}

Huang, J. F. ^{[1
]}

Tsai, M. -J. ^{[1
]}

机构：

[1] ITRI, ERSO, Hsinchu, Taiwan

来源：

2006 INTERNATIONAL SYMPOSIUM ON VLSI TECHNOLOGY, SYSTEMS, AND APPLICATIONS (VLSI-TSA), PROCEEDINGS OF TECHNICAL PAPERS | 2006年

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

The toggle cell of MRAM needs large current for writing. In this work, the negative pulse scheme for toggle writing is proposed, and the implemented architecture is also described. The scheme can reduce the writing current and improve the toggle yield. A single current source scheme is also designed to provide the symmetrical and bi-directional current.

引用

页码：44 / +

页数：2

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