Learning algorithms for a neural network in FPGA

被引：4

作者：

Aoyama, T ^{[1
]}

Wang, QY ^{[1
]}

Suematsu, R ^{[1
]}

Shimizu, R ^{[1
]}

Nagashima, U ^{[1
]}

机构：

[1] Miyazaki Univ, Fac Engn, Miyazaki 8892192, Japan

来源：

PROCEEDING OF THE 2002 INTERNATIONAL JOINT CONFERENCE ON NEURAL NETWORKS, VOLS 1-3 | 2002年

关键词：

D O I：

10.1109/IJCNN.2002.1005613

中图分类号：

TP18 [人工智能理论];

学科分类号：

081104 ; 0812 ; 0835 ; 1405 ;

摘要：

We researched simplified multi-layer neural networks to equip them in one-chip FPGA. We reexamined neuron functions, bits number of connection-weights, and learning methods; and proposed a "and/or"-neural network, which is derived from the disjunctive-normal-form in the binary logic; however it can be expanded to the multi-valued. We designed the network by using HDL.

引用

页码：1007 / 1012

页数：4

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