共 50 条
- [1] A MDSP (multimedia DSP) chip for portable multimedia applications [J]. ISCAS '99: PROCEEDINGS OF THE 1999 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOL 4: IMAGE AND VIDEO PROCESSING, MULTIMEDIA, AND COMMUNICATIONS, 1999, : 283 - 286
- [2] A reconfigurable processing system for DSP applications [J]. PROCEEDINGS OF THE 39TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III, 1996, : 864 - 867
- [3] Flexible Reconfigurable Architecture for DSP Applications [J]. 2014 27TH IEEE INTERNATIONAL SYSTEM-ON-CHIP CONFERENCE (SOCC), 2014, : 204 - 209
- [4] Reconfigurable DSP Architectures for SDR applications [J]. 2007 14TH IEEE INTERNATIONAL CONFERENCE ON ELECTRONICS, CIRCUITS AND SYSTEMS, VOLS 1-4, 2007, : 971 - +
- [5] MorphoSys: A reconfigurable architecture for multimedia applications [J]. XI BRAZILIAN SYMPOSIUM ON INTEGRATED CIRCUIT DESIGN, PROCEEDINGS, 1998, : 134 - 139
- [6] Survey of reconfigurable architectures for multimedia applications [J]. VLSI CIRCUITS AND SYSTEMS IV, 2009, 7363
- [7] Supporting reconfigurable parallel multimedia applications [J]. EURO-PAR 2006 PARALLEL PROCESSING, 2006, 4128 : 765 - 776
- [8] A reconfigurable DCT architecture for multimedia applications [J]. CISP 2008: FIRST INTERNATIONAL CONGRESS ON IMAGE AND SIGNAL PROCESSING, VOL 1, PROCEEDINGS, 2008, : 360 - 364
- [9] Reconfigurable Filter Coprocessor Architecture for DSP Applications [J]. Journal of VLSI signal processing systems for signal, image and video technology, 2000, 26 : 333 - 359
- [10] Reconfigurable filter coprocessor architecture for DSP applications [J]. JOURNAL OF VLSI SIGNAL PROCESSING SYSTEMS FOR SIGNAL IMAGE AND VIDEO TECHNOLOGY, 2000, 26 (03): : 333 - 359