Multigrid Smoothers on Multicore Architectures

We have addressed in this paper the implementation of red-black multigrid smoothers on high-end microprocessors. Most of the previous work about this topic has been focused on cache memory issues due to its tremendous impact on performance. In this paper, we have extended these studies taking Multicore processors (MCP) into account. With the introduction of MCP. new possibilities arise, which makes a revision of the different alternatives highly advisable. A new strategy is proposed which tries to achieve a cooperation between the threads in a MCP. Performance results on an Intel Core (TM) 2 Duo based system reveal that our alternative scheme can compete with and even improve sophisticated schemes based on loop fusion and tiling transformations aimed at improving temporal locality.