Automating processor customisation: Optimised memory access and resource sharing

被引:0
|
作者
Dimond, Robert [1 ]
Mencer, Oskar [1 ]
Luk, Wayne [1 ]
机构
[1] Univ London Imperial Coll Sci & Technol, Dept Comp, 180 Queens Gate, London SW7 2RH, England
基金
英国工程与自然科学研究理事会;
关键词
D O I
暂无
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
We propose a novel methodology to generate Application Specific Instruction Processors (ASIPs) including custom instructions. Our implementation balances performance and area requirements by making custom instructions reusable across similar pieces of code. In addition to arithmetic and logic operations, table look-ups within custom instructions reduce costly accesses to global memory. We present synthesis and cycle-accurate simulation results for six embedded benchmarks running on customised processors. Reusable custom instructions achieve an average 319% speedup with only 5% additional area. The maximum speedup of 501% for the Advanced Encryption Standard (AES) requires only 3.6% additional area.
引用
收藏
页码:204 / +
页数:2
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