Multi-level filter for infrared image processing

This paper presents a new multi-level filter algorithm and its corresponding VLSI architecture for infrared image processing. The algorithm eliminates the phenomena of splitting targets by inserting Gaussian pyramid processing. Owning three filter paths, the proposed filter VLSI architecture can enhance small targets with different size in infrared images. This architecture has been implemented using SMIC 0.35 mu m 4-layer CMOS technology. The test result shows that the filter chip not only effectively suppresses background, eliminates noise and enhances small targets in an infrared image, but also meets infrared image real-time processing requirement(5M similar to 10M pixels/s). The implemented filter chip consists of 60,284 gates and 8K SRAM, operates at 50MHz.