Frequency detector for fast frequency lock of digital PLLs

被引：10

作者：

Kratyuk, V. ^{[1
]}

Hanumolu, P. K. ^{[1
]}

Moon, U. -K. ^{[1
]}

Mayaram, K. ^{[1
]}

机构：

[1] Oregon State Univ, Sch EECS, Corvallis, OR 97331 USA

来源：

ELECTRONICS LETTERS | 2007年 / 43卷 / 01期

关键词：

D O I：

10.1049/el:20073292

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

A new frequency detector, which allows for a fast frequency lock of phase-locked loops (PLLs), is presented. It uses the feedback divider that already exists in a PLL to determine the frequency difference. The proposed frequency detector provides frequency difference information at each reference cycle, and thus guarantees fast frequency acquisition.

引用

页码：13 / 15

页数：3

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