Evaluation of isolation structures against high-frequency substrate coupling in analog/mixed-signal integrated circuits

被引:5
|
作者
Kosaka, Daisuke [1 ]
Nagata, Makoto
Murasaka, Yoshitaka
Iwata, Atsushi
机构
[1] Kobe Univ, Dept Comp & Syst Engn, Kobe, Hyogo 6578501, Japan
[2] ARTec Corp, Higashihiroshima 7390047, Japan
关键词
substrate coupling; equivalent circuit modeling; guard ring; guard band; deep n-well; substrate noise analysis; S21; measurement; F-matrix computation;
D O I
10.1093/ietfec/e90-a.2.380
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
Substrate-coupling equivalent circuits can be derived for arbitrary isolation structures by F-matrix computation. The derived netlist represents a unified impedance network among multiple sites on a chip surface as well as internal nodes of isolation structures and can be applied with SPICE simulation to evaluate isolation strengths. Geometry dependency of isolation attributes to layout parameters such as area, width, and location distance. On the other hand, structural dependency arises from vertical impurity concentration specific to p(+)/n(+) diffusion and deep n-well. Simulation-based prototyping of isolation structures can include all these dependences and strongly helps establish an isolation strategy against high-frequency substrate coupling in a given technology. The analysis of isolation strength provided by p(+)/n(+) guard ring, deep n-well guard ring as well as deep n-well pocket well explains S21 measurements performed on high-frequency test structures targeting 5 GHz bandwidth, that was formed in a 0.25-mu m CMOS high frequency.
引用
收藏
页码:380 / 387
页数:8
相关论文
共 50 条
  • [1] Substrate noise coupling in mixed-signal integrated circuits
    Shi, Yibing
    Chen, Guangju
    Wang, Houjun
    [J]. Dianzi Keji Daxue Xuebao/Journal of University of Electronic Science and Technology of China, 2000, 29 (02): : 174 - 177
  • [2] Isolation strategy against substrate coupling in CMOS mixed-signal/RF circuits
    Kosaka, D
    Nagata, M
    Hiraoka, Y
    Imanishi, I
    Maeda, M
    Murasaka, Y
    Iwata, A
    [J]. 2005 SYMPOSIUM ON VLSI CIRCUITS, DIGEST OF TECHNICAL PAPERS, 2005, : 276 - 279
  • [3] Efficient methods for modelling substrate coupling in mixed-signal integrated circuits
    Singh, R
    Sali, S
    Woo, WL
    [J]. ELECTRONICS & COMMUNICATION ENGINEERING JOURNAL, 2001, 13 (06): : 237 - 248
  • [4] Verification of RF and mixed-signal integrated circuits for substrate coupling effects
    Verghese, NK
    Allstot, DJ
    [J]. PROCEEDINGS OF THE IEEE 1997 CUSTOM INTEGRATED CIRCUITS CONFERENCE, 1997, : 363 - 370
  • [5] Analog/Mixed-Signal Integrated Circuits for Quantum Computing
    Bardin, Joseph C.
    [J]. 2020 IEEE BICMOS AND COMPOUND SEMICONDUCTOR INTEGRATED CIRCUITS AND TECHNOLOGY SYMPOSIUM (BCICTS), 2020,
  • [6] Substrate Coupling in Mixed Signal Integrated Circuits
    Sadiku, Matthew N. O.
    Issa, Elie M.
    Attia, John O.
    Momoh, Omonowo D.
    [J]. IEEE SOUTHEASTCON 2011: BUILDING GLOBAL ENGINEERS, 2011, : 401 - 404
  • [7] Concurrent error detection in analog and mixed-signal integrated circuits
    Lubaszewski, M
    Mir, S
    Rueda, A
    Huertas, JL
    [J]. 38TH MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, PROCEEDINGS, VOLS 1 AND 2, 1996, : 1151 - 1156
  • [8] Software enhances design of analog/mixed-signal integrated circuits
    Moretti, G
    [J]. EDN, 2001, 46 (04) : 26 - 26
  • [9] High-level simulation of substrate noise in mixed-signal integrated circuits
    Shanthi, M. J.
    Swamy, M. N. Shanmukha
    Gurumurthy, K. S.
    Kim, Bruce
    [J]. PROCEEDINGS OF THE FOURTH IASTED INTERNATIONAL CONFERENCE ON CIRCUITS, SIGNALS, AND SYSTEMS, 2006, : 74 - +
  • [10] Estimation and suppression of substrate noise in mixed-signal integrated circuits
    Kumar, G
    [J]. Proceedings of the IEEE INDICON 2004, 2004, : 542 - 545