共 50 条
- [1] On hardware-in-the-loop simulation [J]. 2005 44TH IEEE CONFERENCE ON DECISION AND CONTROL & EUROPEAN CONTROL CONFERENCE, VOLS 1-8, 2005, : 3194 - 3198
- [3] Visualization in hardware-in-the-loop simulation [J]. TECHNOLOGIES FOR SYNTHETIC ENVIRONMENTS: HARDWARE-IN-THE-LOOP TESTING II, 1997, 3084 : 358 - 363
- [4] HARDWARE-IN-THE-LOOP SIMULATION FOR ELECTRIC POWERTRAINS [J]. REVUE ROUMAINE DES SCIENCES TECHNIQUES-SERIE ELECTROTECHNIQUE ET ENERGETIQUE, 2012, 57 (02): : 212 - 221
- [5] BGT hardware-in-the-loop simulation facility [J]. TECHNOLOGIES FOR SYNTHETIC ENVIRONMENTS: HARDWARE-IN-THE-LOOP TESTING IV, 1999, 3697 : 2 - 10
- [6] Graphical description for Hardware-In-the-Loop simulation [J]. 2008 IEEE INTERNATIONAL SYMPOSIUM ON INDUSTRIAL ELECTRONICS, VOLS 1-5, 2008, : 2506 - 2511
- [7] A multimode realtime hardware-in-the-loop simulation [J]. TECHNOLOGIES FOR SYNTHETIC ENVIRONMENTS: HARDWARE-IN-THE-LOOP TESTING V, 2000, 4027 : 74 - 81
- [8] HARDWARE-IN-THE-LOOP SIMULATION FOR AN ACTIVE MISSILE [J]. SIMULATION, 1982, 39 (05) : 159 - 167
- [9] Interface issues in hardware-in-the-loop simulation [J]. 2005 IEEE ELECTRIC SHIP TECHNOLOGIES SYMPOSIUM, 2005, : 39 - 45