A 0.01-8-GHz (12.5 Gb/s) 4 x 4 CMOS Switch Matrix

被引:8
|
作者
Shin, Donghyup [1 ]
Kang, Dong-Woo [1 ]
Rebeiz, Gabriel M. [1 ]
机构
[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA
关键词
CMOS; crosspoint switch; microwave integrated circuits; reconfigurable architectuire; switch matrix; EQUALIZER;
D O I
10.1109/TMTT.2011.2176501
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
This paper presents a 0.01-8-GHz 4 x 4 switch matrix in 0.13-mu m CMOS technology. A deep n-well series-shunt-series switch is chosen as the switching core, and the transistor sizes are optimized for low insertion loss and high isolation up to 8 GHz. Full electromagnetic analysis is also performed on the switching core to result in a compact design. The 4 x 4 switch matrix shows a measured insertion loss of 2.0-3.3 dB and an isolation of 50-44 dB at 2-8 GHz with near-zero power consumption. The measured input P-1 and IP3 are 8-10 and 26-30 dBm at 0.5-8 GHz. The switch matrix has very low dispersion with < 6-ps group-delay variation and can switch a 12.5-Gb/s signal with a bit error rate of < 10(-12). The design can be used in reconfigurable 0.01-8 GHz communication systems or as a crossbar switch matrix for data routing.
引用
收藏
页码:381 / 386
页数:6
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