A single-chip FPGA design for real-time ICA-based blind source separation algorithm

被引:19
|
作者
Charoensak, C [1 ]
Sattar, F [1 ]
机构
[1] Nanyang Technol Univ, Sch Elect & Elect Engn, Singapore 639798, Singapore
关键词
D O I
10.1109/ISCAS.2005.1465962
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Blind source separation (BSS) of independent sources from their mixtures is a common problem in real world multi-sensor applications. In this paper, we propose efficient hardware architecture for the implementation of real-time BSS that can be implemented using a low-cost FPGA. The architecture offers a good balance between hardware requirement (gate count and minimal clock speed) and separation performance. The FPGA design implements the modified Torkkola's BSS algorithm for audio signals based on ICA (Independent Component Analysis) technique. The separation is performed by implementing noncausal filters, instead of the typical causal filters, within the feedback network. Architecture of the hardware is described. Results of various FPGA simulations and real-time testing of the final hardware design in real environment are given.
引用
收藏
页码:5822 / 5825
页数:4
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