Low-voltage fully differential difference transconductance amplifier

A new complementary metal-oxide-semiconductor (CMOS) structure for fully differential difference transconductance amplifier (FDDTA) is presented in this study. Thanks to using the non-conventional quasi-floating-gate (QFG) technique the circuit is capable to work under low-voltage supply of 0.6 V with extended input voltage range and with class AB output stages. The QFG multiple-input metal-oxide-semiconductor transistor is used to reduce the count of the differential pairs that needed to realise the FDDTA with simple CMOS structure. The static power consumption of the proposed FDDTA is 40 mu W. The FDDTA was designed in Cadence platform using 0.18 mu m CMOS technology from Taiwan Semiconductor Manufacturing Company (TSMC). As an example of applications a three-stage quadrature oscillator and fifth-order elliptic low-pass filter are presented to confirm the attractive features of the proposed CMOS structure of the FDDTA.