A toolset for the specification and verification of embedded systems

被引:0
|
作者
Rebaiaia, ML [1 ]
Benmohamed, M [1 ]
Jaam, JM [1 ]
Hasnah, A [1 ]
机构
[1] Univ Batna, Dept Comp Sci, Batna, Algeria
关键词
UML; verification; real time systems; simulation; rewriting logic; temporal logic;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Because of many malfunctions of some critical real-time systems (Pentium bug, Ariane lance rocket), which have caused life and billion dollars loss, computer aided formal methods have been developed and successfully applied for the debugging and the verification of hardware/software. The cost of correction of a hardware/software bug is huge enough to justify high expenses to develop more and more verification techniques to safeguard investments. Present software verification technology can certainly be useful but is yet too limited to cope with the formidable challenge caused by the fast development of the technology essentially the embarked one. In this paper, we underline the various features of a tool based on four different systems: a specification, a simulation, a verification and a code-generation models. The ABP protocol is introduced as an application test.
引用
收藏
页码:1539 / 1545
页数:7
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