FPGA-Based Particle Recognition in the HADES Experiment

HADES experiment was conducted to investigate hadron properties inside nuclear matter. Two pattern recognition algorithms are implemented on FPGA platform, particle track reconstruction in the mini drift chamber (MDC) detectors and ring recognition in the ring image Cherenkov (RICH) detector. Given the constant diameter of ring patterns, the computation challenge lies in identifying the position of ring centers. Incoming RICH subevents contain the positions of hit pixels on the RICH plane. All the hit pixels belonging to the same event will be extracted and buffered in the single-event buffer in the ring recognition unit (RRU). the FPGA's fine-grained memory using block RAMs is efficient for implementing the fast memory access of lookup table (LUT). It also contributes to hardware acceleration on pattern recognition algorithms.