Optimizing the HIRLAM system to NEC-SX4

The transition to message passing and fully distributed memory has been postponed to the next generation of computers at DMI. The NEC SX4 fulfills DMI's requirements for both memory bandwidth and scalability, even though it is a vector parallel system with shared memory. A single NEC processor is more than 15-20 times faster than the fastest scalar processor on the HIRLAM reference forecast model (1), but the price of a 20 processor MPP system is normally higher than a single processor NEC SX4. We consider the NEC SX4 to be a very efficient system in the range 1-30 Gflops for the purpose of running the HIRLAM system operationally.