Hardware implementation of 1D wavelet transform on an FPGA for infrasound signal classification

Infrasound is a low frequency acoustic phenomenon that typically ranges from 0.01 to 20 Hz. The data collected from infrasound microphones are presented online by the infrasound monitoring system operating in Northern Europe, i.e., the Swedish-Finnish Infrasound Network (SFIN). Processing the continuous flow of data to extract optimal feature information is important for real-time signal classification. Performing wavelet decomposition on the real-time signals is an alternative. The purpose of this paper is to present the design and FPGA implementation of discrete wavelet transforms (DWT) for real-time infrasound data processing; our approach uses only two FIR filters, a high-pass and a low-pass filter. A compact implementation was realized with pipelining techniques and multiple use of generalized building blocks. The design was described in VHDL and the FPGA implementation and simulation were performed on the QUARTUS II platform.