Efficient building blocks for reversible sequential circuit design

被引:0
|
作者
Hari, Siva Kumar Sastry [1 ]
Shroff, Shyam [1 ]
Mahammad, Sk. Noor [1 ]
Kamakoti, V. [1 ]
机构
[1] Indian Inst Technol, Dept Comp Sci & Engn, Reconfigurable & intelligent Syst Engn Grp, Madras 600036, Tamil Nadu, India
关键词
reversible logic; reversible gate; power dissipation; flip-flop; garbage;
D O I
暂无
中图分类号
TP301 [理论、方法];
学科分类号
081202 ;
摘要
Reversible logic is gaining interest in the recent past due to its less heat dissipating characteristics. It has been proved that any Boolean function can be implemented using reversible gates. In this paper we propose a set of basic sequential elements that could be used for building large reversible sequential circuits leading to logic and garbage reduction by a factor of 2 to 6 when compared to existing reversible designs reported in the literature.
引用
收藏
页码:437 / +
页数:2
相关论文
共 50 条
  • [1] Efficient Methodology for Testable Reversible Sequential Circuit Design
    Banik, Debajyoty
    [J]. PROCEEDINGS OF THE FIRST IEEE INTERNATIONAL CONFERENCE ON POWER ELECTRONICS, INTELLIGENT CONTROL AND ENERGY SYSTEMS (ICPEICES 2016), 2016,
  • [2] An Efficient Reversible Cryptographic Circuit Design
    Mondal, Bikromadittya
    Dey, Kushal
    Chakraborty, Susanta
    [J]. 2016 20TH INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AND TEST (VDAT), 2016,
  • [3] The Design of Reversible Gate and Reversible Sequential Circuit based on DNA Computing
    Song, Tao
    Wang, Shudong
    Wang, Xun
    [J]. 2008 3RD INTERNATIONAL CONFERENCE ON INTELLIGENT SYSTEM AND KNOWLEDGE ENGINEERING, VOLS 1 AND 2, 2008, : 114 - +
  • [4] ENERGY EFFICIENT REVERSIBLE BUILDING BLOCKS RESISTANT TO POWER ANALYSIS ATTACKS
    Saravanan, P.
    Kalpana, P.
    [J]. JOURNAL OF CIRCUITS SYSTEMS AND COMPUTERS, 2014, 23 (09)
  • [5] Online testable reversible logic circuit design using NAND blocks
    Vasudevan, DP
    Lala, PK
    Parkerson, JP
    [J]. 19TH IEEE INTERNATIONAL SYMPOSIUM ON DEFECT AND FAULT TOLERANCE IN VLSI SYSTEMS, PROCEEDINGS, 2004, : 324 - 331
  • [6] An Efficient Design of Graycode Circuit Using Reversible Logic
    Moon, Seo Yeon
    Park, Jong Hyuk
    [J]. ADVANCED SCIENCE LETTERS, 2016, 22 (09) : 2607 - 2608
  • [7] Design and Demonstration of MEM Relay-Based Arithmetic and Sequential Circuit Blocks
    Li, Ren
    Fariborzi, Hossein
    [J]. IEEE TRANSACTIONS ON ELECTRON DEVICES, 2021, 68 (12) : 6415 - 6421
  • [8] Neural networks as building blocks for the design of efficient learned indexes
    Domenico Amato
    Giosué Lo Bosco
    Raffaele Giancarlo
    [J]. Neural Computing and Applications, 2023, 35 : 21399 - 21414
  • [9] Neural networks as building blocks for the design of efficient learned indexes
    Amato, Domenico
    Lo Bosco, Giosue
    Giancarlo, Raffaele
    [J]. NEURAL COMPUTING & APPLICATIONS, 2023, 35 (29): : 21399 - 21414
  • [10] CIRCUIT - SYSTEM BUILDING-BLOCKS
    LAPIDUS, G
    [J]. IEEE SPECTRUM, 1974, 11 (01) : 54 - 60