Fatigue analysis of high-speed photodiode submodule by using FEM

被引:1
|
作者
Kim, KS [1 ]
Kim, HI
Yu, CH
Chang, EG
机构
[1] Yeojoo Inst Technol, Dept Elect Engn, Yeojoo 469705, South Korea
[2] Chung Ang Univ, Sch Elect & Elect Engn, Seoul 156756, South Korea
[3] Elect & Telecommun Res Inst, Taejon 305350, South Korea
关键词
D O I
10.1016/j.microrel.2003.07.001
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
Higher frequencies, super high-speed, and low-cost demands in wireless communication devices have lead to high density packaging technologies such as flip chip interconnections and multichip modules, as substitutes for wire bonding interconnection. Solder is widely used to connect chips to their packaging substrates in flip chip technology and surface mount technology. We constructed global full 3-D FE models for one photodiode on a submount to predict the fatigue life of solder interconnects during an accelerated thermal cycling testing. The 3-D FE models applied is based on the Darveaux approach does this approach have a non-linear viscoplastic analysis. In the bump structural photodiode submodule, the shortest fatigue life of 233 cycles was obtained at the thermal cycling testing condition from -65 to 150 degreesC. The bump material, rather than submount material, affected and varied the fatigue life. Also, The fatigue life is decreased with increase in creep strain energy density. (C) 2003 Elsevier Ltd. All rights reserved.
引用
收藏
页码:167 / 171
页数:5
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