Programmable code processor for software defined radio

被引:0
|
作者
Perels, D
Bischoff, R
Biveroni, J
Bruehwiler, M
Burg, A
Felber, N
Fichtner, W
机构
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暂无
中图分类号
TP18 [人工智能理论];
学科分类号
081104 ; 0812 ; 0835 ; 1405 ;
摘要
This paper describes a flexible processor capable of producing binary codes for various standards such as UNITS and 802.11b. Its field of application lies in base-stations and in future software defined radio terminals. Because of its flexibility just one or two instances may be integrated into a SoC (System on Chip) where multiple codes are needed. This approach adds flexibility compared to a dedicated code generating structure where the class of codes is fixed. Specialized Bit-ALUs allow to address multiple bits of a register and to operate simultaneously on them. Instructions tailored for code generation enhance its efficiency considerably. The processor was successfully integrated and tested in a 0.25mum 5ML CMOS process.
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页码:2156 / 2160
页数:5
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