Unified dual data caches

被引:1
|
作者
Juurlink, B [1 ]
机构
[1] Delft Univ Technol, Fac Elect Engn Math & Comp Sci, Comp Engn Lab, NL-2600 GA Delft, Netherlands
关键词
D O I
10.1109/DSD.2003.1231897
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The dual data cache is a cache organization with a split temporal/spatial cache. The temporal sub-cache stores data exhibiting temporal locality and the spatial sub-cache saves data exhibiting spatial locality. A locality, prediction table is used to predict the type of locality load/store instructions exhibit. In this way,, both types of locality can be exploited more effectively. Unfortunately, the dual data cache does not make effective use of the entire cache capacity. If most memory references exhibit the same type of locality,, only one sub-cache will be used. In this paper we, therefore, propose a cache organization called the Unified Dual Data Cache that employs only one (unified) cache unit. If a cache miss occurs and the locality prediction is temporal, only, the missing block is fetched from the next memory level. If on the other hand spatial locality is predicted, adjacent blocks are also brought to the cache. In fact, we present two versions of the UDDC called the UDDC Type A (UDDC-A) and the UDDC Type B (UDDC-B), respectively. The difference between the two types is that in the UDDC-B each smaller block is tagged, while in the UDDC-A the smaller blocks within a larger block share the tag.
引用
收藏
页码:33 / 40
页数:8
相关论文
共 50 条
  • [1] Timing analysis for data caches and set-associative caches
    White, RT
    Mueller, F
    Healy, CA
    Whalley, DB
    Harmon, MG
    [J]. THIRD IEEE REAL-TIME TECHNOLOGY AND APPLICATIONS SYMPOSIUM, PROCEEDINGS, 1997, : 192 - 202
  • [2] SOFTWARE ASSISTANCE FOR DATA CACHES
    TEMAM, O
    DRACH, N
    [J]. FUTURE GENERATION COMPUTER SYSTEMS, 1995, 11 (06) : 519 - 536
  • [3] Buildings and terrain unified - multidimensional dual data structure for GIS
    Boguslawski, Pawel
    Gold, Christopher
    [J]. GEO-SPATIAL INFORMATION SCIENCE, 2015, 18 (04) : 151 - 158
  • [4] Rapid Design Space Exploration of Two-level Unified Caches
    Deng, Jingyu
    Liang, Yun
    Luo, Guojie
    Sun, Guangyu
    [J]. 2014 IEEE INTERNATIONAL SYMPOSIUM ON CIRCUITS AND SYSTEMS (ISCAS), 2014, : 1937 - 1940
  • [5] Frequent value compression in data caches
    Yang, J
    Zhang, YT
    Gupta, R
    [J]. 33RD ANNUAL IEEE/ACM INTERNATIONAL SYMPOSIUM ON MICROARCHITECTURE: MICRO-33 2000, PROCEEDINGS, 2000, : 258 - 265
  • [6] Behavior Aware Data Locality for Caches
    Jia, Gangyong
    Li, Xi
    Wang, Chao
    Zhou, Xuehai
    Zhu, Zongwei
    [J]. PROCEEDINGS OF THE 2012 IEEE 18TH INTERNATIONAL CONFERENCE ON PARALLEL AND DISTRIBUTED SYSTEMS (ICPADS 2012), 2012, : 514 - 521
  • [7] Towards a Unified Storage Scheme for Dual Data Models of Knowledge Graphs
    Qin, Yuzhou
    Wang, Xin
    Hao, Wenqi
    [J]. WEB AND BIG DATA. APWEB-WAIM 2022 INTERNATIONAL WORKSHOPS, KGMA 2022, SEMIBDMA 2022, DEEPLUDA 2022, 2023, 1784 : 34 - 44
  • [8] A hardware-efficient dual-source data replication and local broadcast mechanism in distributed shared caches
    Fu, Chao
    Zhou, Yuchao
    Han, Jun
    [J]. MICROELECTRONICS JOURNAL, 2021, 118
  • [9] Value compression to reduce power in data caches
    Aliagas, C
    Molina, C
    Garcia, M
    Gonzalez, A
    Tubella, J
    [J]. EURO-PAR 2003 PARALLEL PROCESSING, PROCEEDINGS, 2003, 2790 : 616 - 622
  • [10] A Composite Data Prefetcher Framework for Multilevel Caches
    Arora, Harsh
    Banerjee, Suvechhya
    Davina, V.
    [J]. 2014 INTERNATIONAL CONFERENCE ON ADVANCES IN COMPUTING, COMMUNICATIONS AND INFORMATICS (ICACCI), 2014, : 1827 - 1833