Performance analysis for chipsets and systems

被引：0

作者：

Lutz, DR ^{[1
]}

Kahne, B ^{[1
]}

机构：

[1] Motorola Somerset Design Ctr, Austin, TX 78730 USA

来源：

1999 IEEE INTERNATIONAL PERFORMANCE, COMPUTING AND COMMUNICATIONS CONFERENCE | 1999年

关键词：

D O I：

10.1109/PCCC.1999.749470

中图分类号：

TP [自动化技术、计算机技术];

学科分类号：

0812 ;

摘要：

Plasma is a new tool for modeling the timing of chipsets and other system components. Modeling chipsets is in some ways more difficult than modeling processors: the interfaces are more complex: and more numerous, the internal queues and buffers are larger, and the traces are much more complicated. We have used Plasma to create a timing model for a modern chipset. The resulting model is fast, flexible, and useful for both design and verification.

引用

页码：445 / 450

页数：6

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