Linearized Parametric Gate for Real-Time Photonic-Sampled Analog-to-Digital Conversion

被引：0

作者：

Wiberg, A. O. J. ^{[1
]}

Myslivets, E. ^{[1
]}

Nissim, R. R. ^{[1
]}

Danicic, A. ^{[1
]}

Blessing, D. J. ^{[1
]}

Kuo, B. P. -P. ^{[1
]}

Radic, S. ^{[1
]}

机构：

[1] Univ Calif San Diego, Dept Elect & Comp Engn, La Jolla, CA 92093 USA

来源：

2011 OPTICAL FIBER COMMUNICATION CONFERENCE AND EXPOSITION (OFC/NFOEC) AND THE NATIONAL FIBER OPTIC ENGINEERS CONFERENCE | 2011年

关键词：

D O I：

暂无

中图分类号：

O43 [光学];

学科分类号：

070207 ; 0803 ;

摘要：

A linearized parametric sampling gate was constructed to explore its performance limits in an analog-to-digital conversion (ADC) architecture. Linear response of the sampling gate can be achieved both in high-resolution and high-rate ADC.

引用

页数：3

共 50 条

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