Electrical reliability of Cu and low-K dielectric integration

The recent demonstrations of manufacturable multilevel Cu metallization have heightened interest to integrate Cu and low-K dielectrics for future integrated circuits. For reliable integration of both materials, Cu may need to be encapsulated by barrier materials since Cu ions (Cu+) might drift through low-K dielectrics to degrade interconnect and device integrity. This paper addresses the use of electrical testing techniques to evaluate the Cu+ drift behavior of low-K polymer dielectrics. Specifically, bias-temperature stress and capacitance-voltage measurements are employed as their high sensitivities are well-suited for examining charge instabilities in dielectrics. Charge instabilities other than Cu+ drift also exist. For example, when Iow-K polymers come into direct contact with either a metal or Si, interface-related instabilities attributed to electron/hole injection are observed. To overcome these issues, a planar Cu/oxide/polymer/oxide/Si capacitor test structure is developed for Cu+ drift evaluation. Our study shows that Cu+ ions drift readily into poly(arylene ether) and fluorinated polyimide, but much more slowly into benzocyclobutene. A thin nitride cap layer can prevent the penetration.