Problem-oriented parallelization of an iterative placement algorithm

This paper describes the improvement of a parallel iterative method for the placement of standard cell circuits in VLSI design. The initial version of the parallel program originated from a straightforward parallelization. This paper presents improvements of the parallel program which consider the specific properties of the application. Measurements on a network of workstations demonstrate the improvements with respect to communication amount and memory requirements. Besides the description of these improvements, we emphasize problems arising when parallelization is refined. We conclude that efficient parallelization of this application type can not be performed exclusively by a parallel programming expert (not to mention automatic parallelization), but requires the support from an application expert.