Design and Temporal Analysis of Hardware-in-the-loop Simulation for Testing Motor Control Unit

被引：2

作者：

Choi, Chinchul ^{[2
]}

Lee, Kangseok ^{[2
]}

Lee, Wootaik ^{[1
]}

机构：

[1] Changwon Natl Univ, Dept Control & Instrumentat Engn, Chang Won, South Korea

[2] Changwon Natl Univ, Grad Sch Control & Instrumentat Engn, Chang Won, South Korea

来源：

JOURNAL OF ELECTRICAL ENGINEERING & TECHNOLOGY | 2012年 / 7卷 / 03期

关键词：

Hardware-in-the-loop (HIL) Simulation; Motor; Control; Model; Time delay; ELECTRIC VEHICLES; POWER ELECTRONICS; SAMPLE REJECTION; SYSTEMS;

D O I：

10.5370/JEET.2012.7.3.366

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper describes a design and temporal analysis of a hardware-in-the-loop (HIL) simulation environment for testing a motor control unit (MCU). The design concepts and main characteristics including unavoidable time delays of each component module are described. From temporal analysis results according to the module integration method, an appropriate solution is proposed to fix and minimize time delays. In order to verify the effectiveness of the proposed solution, the HIL test results are compared with the results of experiments and an offline simulation.

引用

页码：366 / 375

页数：10

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