A Power Efficient, High Gain and High Input Impedance Capacitively-coupled Neural Amplifier

In this article, a capacitively-coupled neural amplifier based on a new high gain low-noise amplifier is proposed. By utilizing a cross-coupled structure, the open-loop gain of the amplifier is boosted. This modification leads to higher closed-loop gain of the amplifier only with one-stage and reduces the gain error. Besides, the input impedance of the amplifier is boosted by a factor of 100 at 100 Hz using a power-efficient technique. A detail analysis to model the high frequency behaviour of input impedance boosting technique is carried out to show and formulate a limitation. The amplifier is designed and simulated in a commercially available 0.18 mu m CMOS technology. The Bandwidth of the amplifier is from 0.5 to 10 kHz and the midband gain is 52 dB. The total input-referred noise is 3.26 mu V-rms in the bandwidth. The noise and power efficiency factor of proposed amplifier is 1.4 and 1.7 , respectively. The superior performance of the amplifier is achieved by increasing the input capacitor value and exploiting noise efficient amplifier. Furthermore, to show the robustness of the proposed structure, a Monte Carlo simulation is carried out for process variation and mismatch. The mean value of the input impedance and CMRR are 10.5 G Omega and 90 dB, respectively. Finally, the total area consumption without pads is 0.03 mm(2).