Understanding and Optimizing Hybrid SSD with High-Density and Low-Cost Flash Memory

被引:11
|
作者
Shi, Liang [1 ,2 ]
Luo, Longfei [1 ]
Lv, Yina [1 ]
Li, Shicheng [1 ]
Li, Changlong [1 ]
Sha, Edwin Hsing-Mean [1 ]
机构
[1] East China Normal Univ, Sch Comp Sci & Technol, Shanghai, Peoples R China
[2] Huazhong Univ Sci & Technol, Wuhan Natl Lab Optoelect, Wuhan, Hubei, Peoples R China
关键词
D O I
10.1109/ICCD53106.2021.00046
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
With the development of NAND flash technology, hybrid SSDs with high-density and low-cost flash memory have become the mainstream of the existing SSD architecture. In this architecture, two flash modes can be dynamically switched, such as single-level cell (SEC) mode and quad-level cell (QLC) mode. Based on evaluations and analysis of multiple real devices, this paper presents two interesting findings. They demonstrate that the coordination between the two flash-modes is not well designed in existing architectures. This paper proposes HyFlex, which redesigns the strategies of data placement and flash-mode management of hybrid SSDs in a flexible approach. Specifically, two novel optimization strategies are proposed: velocity-based 110 scheduling (VIS) and garbage collection (GC)-aware capacity tuning (GCT). Experimental results show that HyFlex achieves encouraging performance and endurance improvement.
引用
收藏
页码:236 / 243
页数:8
相关论文
共 50 条
  • [1] Dynamic File Cache Optimization for Hybrid SSDs with High-Density and Low-Cost Flash Memory
    Gu, Ben
    Luo, Longfei
    Lv, Yina
    Li, Changlong
    Shi, Liang
    2021 IEEE 39TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2021), 2021, : 170 - 173
  • [2] LOW-COST, HIGH-DENSITY MEMORY PACKAGING.
    Clayton, James E.
    Circuits Manufacturing, 1984, 24 (01): : 76 - 82
  • [3] Tail Latency Optimization for LDPC-Based High-Density and Low-Cost Flash Memory Devices
    Lv, Yina
    Shi, Liang
    Luo, Longfei
    Li, Changlong
    Xue, Chun Jason
    Sha, Edwin H-M
    IEEE TRANSACTIONS ON COMPUTER-AIDED DESIGN OF INTEGRATED CIRCUITS AND SYSTEMS, 2022, 41 (03) : 544 - 557
  • [4] HIGH-DENSITY AND LOW-COST WITH PRINTED-CIRCUIT HYBRID TECHNOLOGY
    FLEMING, JH
    LOW, RN
    HEWLETT-PACKARD JOURNAL, 1980, 31 (03): : 25 - 26
  • [5] A novel high-density low-cost Diode Programmable Read Only Memory
    deGraaf, C
    Woerlee, PH
    Hart, CM
    Lifka, H
    deVreede, PWH
    Janssen, PJM
    Sluijs, FJ
    Paulzen, GM
    IEDM - INTERNATIONAL ELECTRON DEVICES MEETING, TECHNICAL DIGEST 1996, 1996, : 189 - 192
  • [6] LOW-COST TESTING OF HIGH-DENSITY LOGIC COMPONENTS
    BASSETT, RW
    BUTKUS, BJ
    DINGLE, SL
    FAUCHER, MR
    GILLIS, PS
    PANNER, JH
    PETROVICK, JG
    WHEATER, DL
    IEEE DESIGN & TEST OF COMPUTERS, 1990, 7 (02): : 15 - 28
  • [7] Low-cost programmer interconnects to high-density packages
    Personal Engineering and Instrumentation News, 1995, 12 (12):
  • [8] High-density High-performance Compactness and Flexibility Low-cost
    Tsukada, Yutaka
    SEN-I GAKKAISHI, 2010, 66 (01) : P12 - P13
  • [9] Cell Devices for High-Density Flash Memory
    Lee, Jong-Ho
    Kim, Young Min
    Bae, Sung-Ho
    Han, Kyung-Rok
    Cho, Il-Hwan
    2008 9TH INTERNATIONAL CONFERENCE ON SOLID-STATE AND INTEGRATED-CIRCUIT TECHNOLOGY, VOLS 1-4, 2008, : 819 - +
  • [10] Trends in high-density flash memory technologies
    Kimura, K
    Kobayashi, T
    2003 IEEE CONFERENCE ON ELECTRON DEVICES AND SOLID-STATE CIRCUITS, 2003, : 45 - 50