A miniature low-insertion-loss, high-power CMOS SPDT switch using floating-body technique for 2.4-and 5.8-GHz applications

A low insertion loss SPDT switch in standard 0.18 mu m CMOS process was developed for 2.4- and 5.8-GHz WLAN applications. In order to reduce the insertion loss and increase the P-1dB, the floating-body circuit topology is proposed. The series-shunt switch achieves a measured P-1dB of 20 dBm, an insertion loss of 1.1 dB, and an isolation of 27 dB at 5.8 GHz. It also achieves a measured insertion loss of 0.65 dB and an isolation of 35 dB at 2.4 GHz. The effective chip size is only 0.03 mm(2). The measured data agree with the simulation results well. To our knowledge, this work presents the low insertion loss, high isolation and good power performance with the smallest chip size among the previously reported 2.4- and 5.8-GHz CMOS switches.