FPGA-based IC design for 3-phase PWM inverter with optimized space vector modulation schemes

被引：0

作者：

Sangchai, W ^{[1
]}

Wiangtong, T ^{[1
]}

Lumyong, P ^{[1
]}

机构：

[1] Mahanakorn Univ Technol, Bangkok, Thailand

来源：

PROCEEDINGS OF THE 43RD IEEE MIDWEST SYMPOSIUM ON CIRCUITS AND SYSTEMS, VOLS I-III | 2000年

关键词：

D O I：

暂无

中图分类号：

TM [电工技术]; TN [电子技术、通信技术];

学科分类号：

0808 ; 0809 ;

摘要：

This paper presents a novel idea to integrate three of the Space Vector Modulation(SVM) schemes,including the alternating zero sequence,the symmetric sequence and the bus clamped, in only a single FPGA chip which provides many advantages. Flexibility, reliability and very compact system are obviously obtained from this designd chip. Moreover, faster design and verification time, design change without penalty are also the benefits resulted in FPGA-Based IC design. The optimized SVM schemes,frequencies and programmable deadtime that used to adjust output signals are obtained through either 4x4 keypad or microprocessor port.

引用

页码：106 / 109

页数：4

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