A small-area composite-varactor-based digitally tunable capacitor operated with positive and negative control voltages is proposed to remove several drawbacks resulting from the metal-insulator-metal (MIM) capacitor of the conventional switched capacitor array (SCA). It was constructed with several composite-varactor branches in parallel, each of which consists of p-type (P+/Pwell) and n-type (N+/Nwell) accumulation-mode varactors in a cascode configuration. The optimum ratio of the channel width between p-type and n-type accumulation-mode varactors was investigated through the simulation in order to maximize a quality factor (Q-factor) of the tunable capacitor at the maximum capacitance (C-MAX) state. The number of composite-varactor unit in each branch was designed to be binary-weighted, and the total capacitance can vary linearly by digitally turning on and off both varactors. It was firstly implemented in 65-nm bulk CMOS process, and showed comparable tuning range, Q-factor, and harmonic distortion performances while reducing the silicon area by half and eliminating the MIM capacitor in comparison with the conventional SCA. In the measurement, the proposed tunable capacitor showed a Q-factor of 60.3 at C-MAX state and a tuning range of 2.8 at 2 GHz frequency band. In addition, it was perfectly capable of handling a high power signal up to 0 dBm with excellent second and third-order harmonic distortion of greater than 70 dBc at the minimum capacitance (C-MIN) state and 77 dBc at C-MAX state.