A 1-Bit Double-Layer Square Slot Element for Reconfigurable Transmitarray Design

This paper proposes a 1-bit linearly polarized reconfigurable transmitarray element with double-layer square slots. The theory for the cascaded 2-layer transmitarray element is presented first, and a dielectric thickness corresponding to a 30 degrees phase delay is suggested as the layer separation in order to get a 180 phase difference with less than 1-dB magnitude loss. The double-layer square slot element is then simulated to verify this analysis, in which the ideal ON and OFF configurations are utilized. The simulation results show a clear out-of-phase transmission between the OFF-state and ON-state.