Architectures validation in an object-oriented framework

This work presents a new method to validate hardware architecture models in an object-based modelling and simulation framework. Our incremental method called SEP consists in simulating high level models to evaluate performances of new hardware architectures relatively to critical digital signal processing applications. Efficient architecture models built early in the design process due to this high-level assessment are refined until they can be used as references helping the design of RTL models. We introduce two of the object-based mechanisms allowing reusable modelling: dynamic binding and module service. We advocate these both mechanisms were efficiently used to take complex types - such as binary decision diagrams (BDD) representing algebraic expressions - into account; and those types are used to validate architecture models, verifying the functional accuracy of high-level services relatively to the specification.