Impact of flash lamp annealing on 20-nm-gate-length metal oxide silicon field effect transistors

被引:2
|
作者
Nishinohara, KT [1 ]
Ito, T [1 ]
Itani, T [1 ]
Suguro, K [1 ]
机构
[1] Toshiba Co Ltd, Proc & Mfg Engn Ctr, Semicond Co, Isogo Ku, Yokohama, Kanagawa 2358522, Japan
来源
关键词
flash lamp annealing; spike annealing; MOSFET; shallow junction; resistivity; mobility;
D O I
10.1143/JJAP.42.L1126
中图分类号
O59 [应用物理学];
学科分类号
摘要
The advantages of using the new flash lamp annealing (FLA) technology and a shallow junction with the consequent low sheet resistivity for metal oxide silicon field effect transistors (MOSFETs) with gate length (L) of 20 nm were clarified by computer simulations based on MOSFETs fabricated with FLA for the first time. In contrast to spike annealing, the shallow junction realized by applying FLA to pMOSFET fabrication enabled the suppression of \I-off\ with a low channel surface dopant concentration, thus providing a higher mobility value and a higher drive current. FLA is promising for improving the performance of sub-30-nm-gate-length MOSFETs.
引用
收藏
页码:L1126 / L1129
页数:4
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