Real-Time Computing on Multicore Processors

被引：0

作者：

Sha, Lui ^{[1
]}

Caccamo, Marco ^{[2
]}

Mancuso, Renato ^{[3
]}

Kim, Jung-Eun ^{[1
]}

Yoon, Man-Ki ^{[1
]}

Pellizzoni, Rodolfo ^{[4
]}

Yun, Heechul ^{[5
]}

Kegley, Russell B. ^{[6
]}

Perlman, Dennis R. ^{[7
]}

Arundale, Greg ^{[8
]}

Bradford, Richard ^{[9
]}

机构：

[1] Univ Illinois, Comp Sci, Urbana, IL 61801 USA

[2] Univ Illinois, Dept Comp Sci, Urbana, IL 61801 USA

[3] Univ Illinois, Comp Sci, Real Time & Embedded Syst Lab, Urbana, IL 61801 USA

[4] Univ Waterloo, Dept Elect & Comp Engn, Waterloo, ON N2L 3G1, Canada

[5] Univ Kansas, Dept Elect Engn & Comp Sci, Lawrence, KS 66045 USA

[6] Lockheed Martin, Aeronaut Co, Bethesda, MD USA

[7] Lockheed Martin, Space Syst Co, Bethesda, MD USA

[8] Rockwell Collins, Adv Technol Ctr, Hyderabad, Andhra Pradesh, India

[9] Rockwell Collins, Commercial Syst Div, Hyderabad, Andhra Pradesh, India

来源：

COMPUTER | 2016年 / 49卷 / 09期

基金：

加拿大自然科学与工程研究理事会; 美国国家科学基金会;

关键词：

D O I：

暂无

中图分类号：

TP3 [计算技术、计算机技术];

学科分类号：

0812 ;

摘要：

Architects of multicore chips for avionics must define and bound intercore interference, which requires assuming a constant worst-case execution time for tasks executing on the chip. With the Single Core Equivalent technology package, engineers can treat each core as if it were a single-core chip.

引用

页码：69 / 77

页数：9

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