Adaptive Runtime Management of Heterogenous MPSoCs: Analysis, Acceleration and Silicon Prototype

In this paper, a dedicated runtime management unit, called CoreManager, is presented. It controls a heterogeneous Multiprocessor System-on-Chip (MPSoC). Therefore, it dynamically schedules tasks on the available processing elements. Furthermore, it is responsible for memory as well as power management. The instruction set architecture of the CoreManager is extended to improve performance for dynamic data dependency checking, task scheduling, processing element (PE) allocation and data transfer management. A significant performance improvement can be shown for all components. Performance results are presented, analyzed and compared with RISC and ASIC based approaches. The integration of the CoreManager in the Tomahawk2 MPSoC silicon prototype is shown. Furthermore, area, timing and power consumption results are provided.