Two op-amps third-order sigma-delta modulator with 61-dB SNDR, 6-MHz bandwidth and 6-mW power consumption

被引:13
|
作者
Bonizzoni, Edoardo [1 ]
Perez, Aldo Pena [1 ]
Maloberti, Franco [1 ]
Garcia-Andrade, Miguel A. [2 ]
机构
[1] Univ Pavia, Dept Elect, I-27100 Pavia, Italy
[2] Univ Autonoma Baja California, Mexicali 21100, Baja California, Mexico
关键词
Sigma-delta modulator; Low power; DVB-H; BROADCAST;
D O I
10.1007/s10470-010-9538-9
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
This low-power Sigma Delta modulator targets the DVB-H requirements and achieves about 10 bit with 6-MHz signal band. Suitable topological modifications enable the realization of a third order modulator with two op-amps. Moreover, a technique for swing reduction of the last op-amp strongly reduces the number of comparators in the quantizer. The power reduction techniques limit the consumption to 6.18 mW, thus yielding a FoM of 0.58 pJ/conversion. The area of the circuit, fabricated with a 0.18-mu m analog CMOS technology, is 0.32 mm(2). Experimental measurements confirm the behavioral study made accounting for the op-amps limitations.
引用
收藏
页码:381 / 388
页数:8
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