Effects of interface trap charges on the electrical characteristics of back-gated 2D Negative Capacitance FET

被引：0
|
作者：
Jiang, Chunsheng [1 ,2 ]
Zhong, Le [1 ,2 ]
Xie, Lei [1 ,2 ]
机构：
[1] China Acad Engn Phys, Microsyst & Terahertz Res Ctr, Chengdu 610200, Peoples R China
[2] China Acad Engn Phys, Inst Elect Engn, Mianyang 621999, Sichuan, Peoples R China
来源：
2019 IEEE 19TH INTERNATIONAL CONFERENCE ON NANOTECHNOLOGY (IEEE-NANO 2019) | 2019年
关键词：
2D Negative Capacitance FET; ferroelectric gate dielectric; analytical model; interface trap charges; low power applications; FIELD-EFFECT TRANSISTORS; MOS2; TRANSISTORS; MODEL;
D O I：
10.1109/nano46743.2019.8993936
中图分类号：
TM [电工技术]; TN [电子技术、通信技术];
学科分类号：
0808 ; 0809 ;
摘要：
In this work, a fully analytical compact drain current model of back-gated two-dimensional (2D) negative capacitance (NC) FET including interface trap charges has been developed by solving Poisson's, drift-diffusion and 1-D Landau-Khalatnikov equations, and it is validated against the experimental data. In addition, the impact of interface trap charges on the electrical characteristics of the backgated 2D NC-FET is investigated systematically based on the model. It is found that the subtresdhold swing (SS) and on-off current ration (I-on/I-off.) are seriously degraded because of the presence of interface traps at 2D channel/oxide interface and 2D NC-FET with a big t(f) is more immune to the degradation induced by the interface traps.
引用
收藏
页码：163 / 166
页数：4
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