Optimisation and fabrication of low-stress, low-temperature silicon oxide cantilevers

被引:5
|
作者
Kshirsagar, A. [1 ]
Duttagupta, S. P. [1 ]
Gangal, S. A. [2 ]
机构
[1] Indian Inst Technol, Dept Elect Engn, Ctr Excellence Nanoelect, Bombay 400076, Maharashtra, India
[2] Univ Pune, Dept Elect Sci, Pune 411007, Maharashtra, India
来源
MICRO & NANO LETTERS | 2011年 / 6卷 / 07期
关键词
CHEMICAL-VAPOR-DEPOSITION; INTEGRATION; NITRIDE; FILMS;
D O I
10.1049/mnl.2011.0076
中图分类号
TB3 [工程材料学];
学科分类号
0805 ; 080502 ;
摘要
Modern lab-on-a-chip systems can benefit from integration of nanoelectromechanical system/microelectromechanical system (NEMS/MEMS) and complementary metal-oxide semiconductor technology with emphasis on low temperature processing. In the present work process, parameters for deposition of silicon oxide (SiO(x)) by inductively coupled plasma chemical vapour deposition (ICPCVD) at low temperature (70 degrees C) are optimised. The sacrificial layer poly(methyl methacrylate) (PMMA) is in-house prepared and optimised. This PMMA sacrificial solution not only gives a low cost wide range of viscosity solutions, but it is also low temperature NEMS process compatible. With optimisations mentioned above, it has been possible to fabricate the whole device without exceeding the thermal budget 100 degrees C. To the best of the authors' knowledge, this is the first report on sub-100 degrees C, surface micromachined SiO(x) cantilevers deposited by ICPCVD and using PMMA as the sacrificial layer for low temperature NEMS applications.
引用
收藏
页码:476 / 481
页数:6
相关论文
共 50 条
  • [1] Infrared dielectric properties of low-stress silicon oxide
    Cataldo, Giuseppe
    Wollack, Edward J.
    Brown, Ari D.
    Miller, Kevin H.
    OPTICS LETTERS, 2016, 41 (07) : 1364 - 1367
  • [2] Low-Stress Bond Pad Design for Low-Temperature Solder Interconnections on Through-Silicon vias (TSVs)
    Zhang, Xiaowu
    Rajoo, Ranjan
    Selvanayagam, Cheryl S.
    Premachandran, Chirayarikathuveedu Sankarapillai
    Choi, Won Kyoung
    Ho, Soon Wee
    Ong, Siong Chiew
    Xie, Ling
    Pinjala, Damaruganath
    Kwong, Dim-Lee
    Khoo, Yee Mong
    Gao, Shan
    IEEE TRANSACTIONS ON COMPONENTS PACKAGING AND MANUFACTURING TECHNOLOGY, 2011, 1 (04): : 510 - 518
  • [3] LOW-TEMPERATURE FORMATION OF SILICON OXIDE
    GLENDINNING, WB
    YARBROUGH, DW
    THIN SOLID FILMS, 1973, 18 (02) : 321 - 327
  • [4] LOW-TEMPERATURE DEPOSITION OF SILICON OXIDE FILMS
    ALT, LL
    ING, SW
    LAENDLE, KW
    JOURNAL OF THE ELECTROCHEMICAL SOCIETY, 1963, 110 (05) : 465 - 465
  • [5] FABRICATION OF LOW-STRESS SILICON STENCIL MASKS FOR ION-BEAM LITHOGRAPHY
    SEN, S
    FONG, FO
    WOLFE, JC
    YEN, JJ
    MAUGER, P
    SHIMKUNAS, AR
    LOSCHNER, H
    RANDALL, JN
    JOURNAL OF VACUUM SCIENCE & TECHNOLOGY B, 1989, 7 (06): : 1802 - 1805
  • [7] Low-temperature low-stress silicon nitride for optoelectronic applications prepared by electron cyclotron resonance plasma chemical-vapor deposition
    Belkouch, S
    Landheer, D
    Taylor, R
    Rajesh, K
    Sproule, GI
    AMORPHOUS AND CRYSTALLINE INSULATING THIN FILMS - 1996, 1997, 446 : 151 - 156
  • [9] A low-stress and low temperature gradient microgripper for biomedical applications
    Einas Gaafar
    Musaab Zarog
    Microsystem Technologies, 2017, 23 : 5415 - 5422
  • [10] Fabrication of low-stress plasma enhanced chemical vapor deposition silicon carbide films
    Lin, TY
    Duh, JG
    Chung, CK
    Niu, H
    JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS, 2000, 39 (12A): : 6663 - 6671