CREMA: Fusing memory and processing for parallel raytracing

被引:0
|
作者
Ochsenfahrt, Ulf [1 ]
Salomon, Ralf [1 ]
机构
[1] Univ Rostock, Fac Comp Sci & Elect Engn, D-18051 Rostock, Germany
来源
EUROCON 2007: THE INTERNATIONAL CONFERENCE ON COMPUTER AS A TOOL, VOLS 1-6 | 2007年
关键词
ray tracing; hardware; complexity theory;
D O I
暂无
中图分类号
TP [自动化技术、计算机技术];
学科分类号
0812 ;
摘要
Under certain conditions, accelerator data structures significantly reduce a raytracer's runtime. But for most of them, unfortunately, the literature does not provide any a priori indication of whether or not they yield any speedup at all in a particular scene. For others though, the literature does provide lower bounds, but those accelerators are of rather theoretical utility. A straight forward analysis indicates that both the sequential processing and memory accesses constitute an inherent bottleneck for any of the software-centered raytracers. By contrast, this paper proposes a parallel hardware architecture, which renders a scene in constant time O(1) per ray, regardless of the scene's size and complexity. A prototypical implementation on a field-programmable gate array validates the architecture's feasibility and provides first laboratory results.
引用
收藏
页码:868 / 873
页数:6
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