Design of CMOS Amplifier Using New CCII Topologies

被引:0
|
作者
Cheng, Li [1 ]
Li, Ning [1 ]
Xi, Jiajian [1 ]
Yang, Ning [1 ]
机构
[1] Jiangsu Univ, Sch Elect & Informat Engn, Zhenjiang, Peoples R China
关键词
current conveyor; CMOS; Low-power; 1/f noise voltage; current mode drive;
D O I
10.4028/www.scientific.net/AMR.328-330.1824
中图分类号
TM [电工技术]; TN [电子技术、通信技术];
学科分类号
0808 ; 0809 ;
摘要
A high-precision amplifier design in a stander 0.35 mu m CMOS process was proposed. This design obtains a high-performance by proper application of dynamic element matching to a second generation current conveyor (CCII). In comparison with the traditional CMOS circuits, the proposed approach can not only increase the output swing and decrease output resistance but also compensate the effect of the input offset and 1/f noise voltage. The simulation results show that the gain error is reduced 38 similar to 50 times than the traditional amplifier, and the precision is significantly improved. So the proposed circuit is suitable for the design of special amplifiers used in various detections and signal mediation.
引用
收藏
页码:1824 / +
页数:2
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