Analysis of electronic memory traps in the oxide-nitride-oxide structure of a polysilicon-oxide-nitride-oxide-semiconductor flash memory

被引：30

作者：

Seo, Y. J. ^{[1
]}

Kim, K. C. ^{[1
]}

Kim, T. G. ^{[1
]}

Sung, Y. M. ^{[2
]}

Cho, H. Y. ^{[3
]}

Joo, M. S. ^{[4
]}

Pyi, S. H. ^{[4
]}

机构：

[1] Korea Univ, Dept Elect Engn, Seoul 136701, South Korea

[2] Korea Univ, Dept Mat & Sci Engn, Seoul 136701, South Korea

[3] Dongguk Univ, Dept Phys, Seoul 100715, South Korea

[4] Hynix Semicond Inc, Adv Proc Div, Gyeonggi Do 407701, South Korea

来源：

APPLIED PHYSICS LETTERS | 2008年 / 92卷 / 13期

关键词：

D O I：

10.1063/1.2830000

中图分类号：

O59 [应用物理学];

学科分类号：

摘要：

The origin of the electron memory trap in an oxide-nitride-oxide structure deposited on n-type Si is investigated by both capacitance-voltage and deep level transient spectroscopy (DLTS). Two electron traps are observed near 0.27 and 0.54 eV, below the conduction band minimum of Si and are identified as the nitride bulk trap and the Si-SiO2 interfacial trap, respectively. The trap depth, viz., vertical distribution of the electron trap, in both nitride bulk and Si-SiO2 interface, are also estimated from the bias voltage dependent DLTS. (C) 2008 American Institute of Physics.

引用

页数：3

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