CiM3D: Comparator-in-Memory Designs Using Monolithic 3-D Technology for Accelerating Data-Intensive Applications

被引:5
|
作者
Ramanathan, Akshay Krishna [1 ]
Rangachar, Srivatsa Srinivasa [2 ]
Govindarajan, Hariram Thirucherai [1 ]
Hung, Je-Min [3 ]
Lee, Chun-Ying [3 ]
Xue, Cheng-Xin [3 ]
Huang, Sheng-Po [3 ]
Hsueh, Fu-Kuo [4 ]
Shen, Chang-Hong [4 ]
Shieh, Jia-Min [4 ]
Yeh, Wen-Kuan [4 ]
Ho, Mon-Shu [5 ]
Sampson, Jack [1 ]
Chang, Meng-Fan [3 ]
Narayanan, Vijaykrishnan [1 ]
机构
[1] Penn State Univ, Sch Elect Engn & Comp Sci EECS, University Pk, PA 16802 USA
[2] Intel Labs, Hillsboro, OR 97124 USA
[3] Natl Tsing Hua Univ, Dept Elect Engn, Hsinchu 30013, Taiwan
[4] Taiwan Semicond Res Inst TSRI, Hsinchu 300091, Taiwan
[5] Natl Chung Hsing Univ, Dept Phys, Taichung 402, Taiwan
基金
美国国家科学基金会;
关键词
3-D-SRAM; computing-in-memory; monolithic (sequential) 3-D integrated circuit (M3D-IC); sparse matrix multiplication; SRAM; MACRO;
D O I
10.1109/JXCDC.2021.3087745
中图分类号
TP3 [计算技术、计算机技术];
学科分类号
0812 ;
摘要
The compare operation is widely used in many applications, from fundamental sorting to primitive operations in the database and AI systems. We present SRAM-based 3-D-CAM circuit designs using a monolithic 3-D (M3D) integration process for realizing beyond-Boolean in-memory compare operation without any area overheads. We also fabricated a processing-in-memory (PiM) macro with the same 3-D-CAM circuit using M3D for performing massively parallel compare operations used in the database, machine learning, and scientific applications. We show various system designs with the 3-D-CAM supporting operations, such as data filtering, sorting, and sparse matrix-matrix multiplication (SpGEMM). Our systems exhibit up to 272 x, 200 x, and 226 x speedups and 151 x, 37 x, and 156 x energy savings compared to systems using near memory compute for the data filtering, sorting, and SpGEMM applications, respectively.
引用
收藏
页码:79 / 87
页数:9
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