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- [3] A novel low-power adiabatic SRAM with an energy-efficient line driver 2004 INTERNATIONAL CONFERENCE ON COMMUNICATION, CIRCUITS, AND SYSTEMS, VOLS 1 AND 2: VOL 1: COMMUNICATION THEORY AND SYSTEMS, 2004, : 1151 - 1155
- [4] Analysis and design of an efficient complementary energy path adiabatic logic for low-power system applications 20TH ANNIVERSARY IEEE INTERNATIONAL SOC CONFERENCE, PROCEEDINGS, 2007, : 247 - 250
- [5] A 0.8V CMOS TSPC adiabatic DCVS logic circuit with the bootstrap technique for low-power VLSI ICECS 2004: 11th IEEE International Conference on Electronics, Circuits and Systems, 2004, : 175 - 178
- [6] Bootstrapped Adiabatic Complementary Pass-Transistor Logic Driver Circuit for Large Capacitive Load and Low-Energy Applications PROCEEDINGS OF THE 2009 12TH EUROMICRO CONFERENCE ON DIGITAL SYSTEM DESIGN, ARCHITECTURES, METHODS AND TOOLS, 2009, : 196 - +
- [7] Special Session: A Novel Low-Power and Energy-Efficient Adiabatic Logic-In-Memory Architecture Using CMOS/MTJ 2020 IEEE 38TH INTERNATIONAL CONFERENCE ON COMPUTER DESIGN (ICCD 2020), 2020, : 25 - 28
- [9] Energy Efficient Bootstrapped CMOS Large RC-Load Driver Circuit for Ultra Low-Voltage VLSI 2010 INTERNATIONAL SYMPOSIUM ON VLSI DESIGN AUTOMATION AND TEST (VLSI-DAT), 2010, : 70 - 73
- [10] Design of Low-Power 10-Transistor Full Adder Using GDI Technique for Energy-Efficient Arithmetic Applications Circuits, Systems, and Signal Processing, 2023, 42 : 3649 - 3667