A VLIW processor for real-time signal processing

被引：0
|
作者：
Nakamura, K
Sakai, K
Ae, T
机构：
来源：
ISSPA 96 - FOURTH INTERNATIONAL SYMPOSIUM ON SIGNAL PROCESSING AND ITS APPLICATIONS, PROCEEDINGS, VOLS 1 AND 2 | 1996年
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D O I：
暂无
中图分类号：
TP18 [人工智能理论];
学科分类号：
081104 ; 0812 ; 0835 ; 1405 ;
摘要：
We propose a VLIW hardware stack processor (in short, VLIW-HSP) for real-time signal processing. We suppose that the signals are the multimedia data from high-speed networks or storage devices. The VLIW-HSP consist of four hardware stack units (HSUs) and one control unit (CU). Each HSU has a data stack, a local register and a multiport register, and can execute the same operation set for macro level parallelism. First we discuss the usefulness of VLIW and hardware Stack. Next we show the design of VLIW-HSP and its evaluation.
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页码：664 / 667
页数：4
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