Modeling and Simulation of Ultra-Wideband Communication Receiver Based on Balanced Sampling and Integrating Circuit

In order to solve the problem of extracting signals from impulse radio ultra-wideband (IR-UWB) receivers in a low signal-to-noise ratio (SNR) environment, this paper uses circuit transient analysis to establish a mathematical model of an ultra-wideband wireless communication receiver based on a balanced sampling and integration circuit (BSIC). The effect of receiver circuit component parameters on the output signal is simulated and tested, and the optimization of circuit component parameters for UWB wireless communication receivers is achieved. The sampling capacitance in the receiver circuit ranges from 1 pF to 6 pF, depending on the 200 ps pulse width. The output signal amplitude increases as the sampling capacitance increases. The range of integral capacitance is from 2.5 pF to 25 pF, which is based on a 100 ns interval between two pulses. The output signal amplitude decreases as the integration capacitance increases and the signal waveform becomes better as the integration capacitance increases. The effect of SNR from 0 to -30 dB on the receiver output is simulated, and the results show that the Bit Error Ratio (BER) of the receiver is less than 10(-3) when the SNR is greater than -15 dB. The simulation and test results show that the model developed in this paper is useful as a guide for optimizing the receiver parameters at low SNR.